Senior ASIC Hardware Design Engineer
We are now looking for a Senior ASIC Hardware Design Engineer. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading Smart Network Interface Cards (Smart-NICs) and Data Processing Units (DPUs). This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. We have crafted a team of excellent people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
NVIDIA’s Networking Chip Design group works on Smart-NICs and DPUs which help accelerate network performance while reducing the CPU overhead of Internet Protocol (IP) packet transport, freeing more processor cycles to run applications. These networking processors also embed innovative hardware engines that offload and accelerate security with in-line encryption/decryption. With unmatched RDMA over Converged Ethernet (RoCE) performance, NVIDIA Smart-NICs and DPUs deliver efficient, high-performance remote direct-memory access (RDMA) services to bandwidth- and latency-sensitive applications. The Networking Chip Design in India is a new team which is growing at a fast pace. The Networking Chip Design group is looking for inquisitive, motivated engineers with experience to build ground-breaking NICs. As a senior member of our design team, you will be responsible for the design and implementation of high-performance NIC IPs. You will work closely with architects, design engineers, verification engineers, and physical design engineers to accomplish your tasks.
What you will be doing:
Participate in micro-architecture development and document specifications of NIC IP Blocks.
Implement in RTL and debug working with the verification team to ensure that the design is functional.
Apply logic design skills to optimize and meet performance and power goals.
Deliver a synthesis/timing clean design while working with the physical design team to ensure a routable and physically implementable design.
Support hardware engineering activities including chip floor plan, power/clock distribution, chip assembly, timing closure, power and noise analysis, and back-end verification.
Develop flows and tools as necessary in support of design activities.
What we need to see:
A Bachelor’s/Master's degree in electrical engineering or computer engineering with 3+ years of relevant experience in micro-architecture and RTL development of complex designs, ideally in NIC or Computer Networking architectures
Exposure to Computer Architecture and Digital Systems design.
Highly proficient in logic design, Verilog and/or System-Verilog, with a deep understanding of physical design and VLSI.
Strengths in scripting languages such as Perl, Python.
Good interpersonal skills.
With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers. We employ some of the most forward-thinking and hardworking people in the world. Are you passionate about becoming a part of an outstanding team supporting the latest in CPU technology? If so, we want to hear from you.
NVIDIA is an equal opportunity employer. We value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.