NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by phenomenal technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent.
As an NVIDIAN, you’ll be immersed in a diverse, inclusive and supportive environment where everyone is inspired to do their life's best work. The complexity of IOs increased many-fold to support the sophisticated speeds that power our product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. IODFX Engineering team at NVIDIA works on groundbreaking innovations involving crafting creative solutions for IO and interconnect testing for some of the industry's most complex semiconductor chips. Join the team and see how you can make a lasting impact on the world.
What you'll be doing:
POR to Post Silicon Testing of DFX features for high speed IOs. This includes crafting of test features crucial for manufacturing testability of HighSpeed IOs. Architect, Design & Validate these test features with a robust & scalable testplan development at unit-level and SOC/Full Chip level using verification methodologies like UVM and NVIDIA Internal tools. Pre-Silicon Simulation and Debug of Test functionality using standard Industry tools and sign off on Test coverage for various products using standard coverage metrics.
Ability to work on automation, flow development & improvement, coverage metrics, test execution, bug identification/fix and IO-test productization.
Solve complex Test problems in the mixed-signal world and develop a scalable test solution that works across platforms.
Work with powerful Industry-standard tools for Design and verification methodologies. This includes SV, UVM, Perl, Python and NVIDIA custom tools/flows.
Partnering closely with our IP teams for design/verification of IOBIST test-logic, Collaborating with Mixed Signal Circuit design teams to understand the analog design components in an IO cell. Collaborate with other DFX teams, coordinate with Post Silicon Test Engineering and Production Engineering teams for productizing quality test at efficient test cost.
What we need to see:
Btech/BE/BS or Mtech/ME/MS in EE/ECE or PhD (or equivalent experience)
Solid Analytical and Problem Solving skills.
Good understanding and Exposure to Logic design, Architecture & Verification
Strong Coding skills in industry standard scripting languages.
4+ yrs of experience in DFT and/or RTL Design with Microarchitecture understanding and/or Industry-standard Verification flows like constrained random testing, UVM, coverage metrics, profiling tools, X prop, etc.
Outstanding written and oral communication skills with the curiosity to learn.
With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world’s most desirable employers. We have some of the most thoughtful and versatile people in the world working for us and, due to unprecedented growth, our elite engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you.